EDN

Building a better memory controller: architectural performance exploration of an AXI memory controller

Communicationbetween processors and memories is often a major bottleneck, making the designof the memory controller a critical task in determining overall system-levelperformance. The memory ...
EDN

Memory models for embedded multicore SoCs, Part 3 – Memory structures

Editor's Note: Multicore architectures find use across a diverse range of applications thanks to their performance and efficiency. By combining several general-purpose MCU cores — or MCU cores and ...