Almost every chip being taped out today is mixed-signal in nature. In addition to increased integration of analog and RF blocks, designers are using complex power-management techniques to minimize ...
In the era of big data and artificial intelligence, a new approach has emerged for solving combinatorial optimization ...
To address emerging custom circuit design challenges, Mountain View, Calif.-based EDA giant Synopsys Inc. today unveiled its anticipated next-generation transistor-level static timing analysis tool, ...
Nothing is worse for a design team than a chip that fails to work in the bringup lab. Electrical problems are historically a major cause of such failures. Power leaks, power-ground DC paths, missing ...
Curious about how to precisely determine the optimal voltage-regulator setpoints for your System-on-Chip (SoC)? In this video, we dive into how transistor-level Power Delivery Network (PDN) telemetry ...
This year, several companies are expected to bring 600/650 V Gallium Nitride (GaN) power transistors to market. Almost all will be normally-on (depletion mode) transistors connected in a cascode ...
What is a Single-Electron Transistor? A single-electron transistor (SET) is a nanoscale electronic device that allows the precise control of individual electrons. Unlike conventional transistors that ...
The big picture: Researchers from the University of California have developed a first-of-its-kind, solid-state thermal transistor that could one day be used to better control heat in electronic ...