EDN

C-Language techniques for FPGA acceleration of embedded software

Developers of embedded and high-performance systems are taking increased advantage of FPGAs for hardware-accelerated computing. FPGA computing platforms effectively bridge the gap between software ...
Business Wire

Aldec Introduces Hardware Assisted RTL Simulation Acceleration for Microchip FPGA Designs

HENDERSON, Nev.--(BUSINESS WIRE)--Aldec, Inc., a pioneer in mixed-HDL language simulation and hardware-assisted verification for ASIC and FPGA designs, has introduced a HES-DVM™ simulation ...
Business Wire

Intel Announces Next-Generation Acceleration Card to Deliver 5G

BARCELONA--(BUSINESS WIRE)--What’s New: Today at Mobile World Congress (MWC) 2019, Intel announced the Intel® FPGA Programmable Acceleration Card N3000 (Intel® FPGA PAC N3000), designed for service ...
Design-Reuse

CAST Introduces GZIP Accelerator Through New Intel FPGA Data Center Acceleration Ecosystem

WOODCLIFF LAKE, NJ USA, Oct. 17, 2017 – A hardware accelerator that addresses the data compression and storage optimization needs of performance-critical data center applications is now available from ...